SUMMARY

Take the major responsibility for Signal integrity design for Server and Storage. Provide necessary inputs regarding high-speed signal quality and design constraints to electronics designers for signal & design quality assurance. Drive innovation and continuous improvement within Jabil Circuit by harnessing new technologies and methodologies. Provide exceptional support to external and internal customers, team members, and other persons through technical project coordination.

ESSENTIAL DUTIES AND RESPONSIBILITIES include, but are not limited to the following:

• Principle points of contact to internal or external team, partners, and customer
• SI simulation resource (Tools/Human) management
• SI design schedule/Status/Risk/Issue management
• Create SI check list and review or generate SI reports.
• Publish final SI reports.
• SI team defect quality and lesson learnt.
• SI engineer training
• Responsible for the high-speed signal pre-simulation and post-simulation, layout constraints preparation, and PCB design
• Perform system level’s signal integrity and timing analysis on boards, packages, connectors, and ASICs etc.
• Cooperate with EA (Electronic Analysis) engineers to develop EA test plans.
• Correlate SI simulations and EA tests to validate the modeling methodology.
• Contribute to the design trade-offs and evaluation of mechanical, electrical, and thermal performance of both components and system level.
• Cooperate with electronics engineers for signal waveform issues & debug.

REQUIREMENTS:

• Master’s degree in electrical engineering or equivalent with at least 5 years related experience in Server/Storage signal integrity design.
• Proficient with component/board level’s reflection, crosstalk, ground bounce, bypassing techniques for power/ground noise reduction, termination techniques for reflection noise control and insertion loss deviation and loss budget for industry specification
• Proficient with PCB cross-section/stack-up design and trade-off, SERDES channel analysis and impedance calculation etc.
• Proficient with 2D/3D SI analysis tools such as Ansys SIwave, HFSS, Cadence PowerDC, PowerSI, Synopsys Hspice and Keysight ADS etc.
• Good working knowledge in various signal test and measurement instruments like network analyzer, and oscilloscope etc.
• Familiar with DDR4/5, PCIe Gen4/5, SAS/SATA, USB, and other standard server SerDes interfaces etc. End2End SI simulation and analysis
• Familiar with server CPU SI simulation flow like Intel ICAT, UPM, AMD Seasim etc.
• Good English in Read/Write
• Understand SI design flow and know how to co-work well with other function teams.

PREFERENCE:

• Experience of working in major server OEM/ODM company, like Quanta, Foxconn, Wistron etc.
• Ever work with Tier one customer like Google, Meta, Dell, HP etc.
• Fluent English in speaking/listening.

BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in.

Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, age, disability, genetic information, veteran status, or any other characteristic protected by law.

Accommodation Statement

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