About the Role

We are seeking a Diagnostics (DIAG) Engineer to develop and maintain hardware diagnostic firmware and tools for our wireline switch platforms. In this role, you will design, implement, and execute hardware-level tests covering switch ASICs, CPU complex, memory, storage, PCIe, optical modules, and board peripherals — supporting bring-up, validation, manufacturing, and field debug across the full product lifecycle.

You will work closely with hardware, BMC, BIOS, SONiC, and validation teams, and your diagnostic suite will be the primary tool used to qualify hardware from EVT through mass production and RMA.

Key Responsibilities

• Design, develop, and maintain diagnostic firmware/utilities for wireline switch platforms (e.g., Tomahawk 5 / Teralynx-class systems), including ONIE-launched DIAG environments.
• Develop hardware test coverage across: switch ASIC, CPU, DDR, SPI/eMMC/SSD, PCIe, USB, I2C/PMBus devices, CPLD/FPGA, fan/thermal/power subsystems, optical modules (SFP/QSFP/OSFP and CPO), and front-panel ports.
• Implement port-level diagnostic tests — link bring-up, PRBS, BER, eye margin, loopback (MAC/PCS/PMA), traffic generation, and signal integrity validation.
• Develop and execute manufacturing test flows (ATE / FATP / system-level test) and work with operations to integrate DIAG into factory provisioning.
• Support hardware bring-up: be the first responder on board-level issues, isolate failures across silicon / board / firmware boundaries.
• Build automation around DIAG — scripting, log parsing, pass/fail criteria, and reporting infrastructure.
• Collaborate with BMC, BIOS, and SONiC teams on shared hardware abstraction, sensor access, and recovery paths.
• Participate in root-cause analysis of field returns and customer-reported hardware issues.

Required Qualifications

• Hands-on experience developing hardware diagnostics, BIST, or low-level validation tools on server, switch, or embedded platforms.
• Strong C/C++ programming with solid debugging skills (gdb, JTAG, logic analyzer, scope).
• Solid understanding of Linux user-space and kernel-space development; comfortable working in ONIE / busybox / minimal Linux environments.
• Working knowledge of low-level hardware interfaces: I2C, PMBus, SPI, UART, JTAG, GPIO, MDIO, PCIe.
• Familiarity with switch hardware concepts: switch ASIC architecture, SerDes, MAC/PCS/PHY layers, optical module management (CMIS / SFF-8636), and front-panel port subsystems.
• Ability to read schematics, board layouts, and component datasheets; comfortable working with hardware engineers in the lab.
• Experience supporting at least one full hardware product cycle (EVT → DVT → PVT → MP).
• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.

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Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, age, disability, genetic information, veteran status, or any other characteristic protected by law.

Accommodation Statement

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